IBM Unveils Next Generation Dual-Architecture Processor

(newsroom.ibm.com)

42 points | by porridgeraisin 1 hour ago

6 comments

  • crmd 1 hour ago
    I was reading HN comments yesterday shitting on modern IBM for being a non tech consulting company that has not innovated since the mid nineties.
    • wmf 7 minutes ago
      The z mainframe team does good technical work but then the high price cancels out all the value of that work. I'm not sure if that counts as innovation or not.
    • monocasa 16 minutes ago
      To be fair, IBM did this in the 90s with the PowerPC 615, which had PowerPC and x86 decoders on the same core.
      • rbanffy 10 minutes ago
        But those ARM and s390x decoders have a “Telum III” architecture behind them with a cache that’s pretty innovative.

        IBM has never stopped innovating. It’s just that most people can’t afford their machines.

    • pavlov 51 minutes ago
      More like mid-2000s, even with the least charitable interpretation.

      There was a time when IBM dominated console CPUs for a massively successful generation (PS3, Xbox 360, Nintendo Wii).

      • Retric 7 minutes ago
        Xbox 360 used an Intel CPU.

        PS3 used the Cell processor but it’s debatable how much that was an asset vs handicap. Total PlayStation sales dropped for that generation vs both PS2 and PS4. The manufacturing costs didn’t fall nearly as fast as expected and it was a poor fit in terms of cross platform development etc.

        PS4 moved to AMD.

        • rbanffy 6 minutes ago
          > Xbox 360 used an Intel CPU.

          No. It was a PowerPC based one called, IIRC, Xenon.

          • Retric 1 minute ago
            Wow, you’re right.

            Xeon vs Xenon

            I had always assumed with chip names that similar it was an Intel product. How on earth didn’t the get sued?

      • rbanffy 7 minutes ago
        Having a presence in the consumer market is not a requirement for being innovative.

        IBM stopped building servers based on x86 because the margins were too thin for their tastes, but they never stopped building on top of POWER and Z.

    • vablings 56 minutes ago
      There are already microcontrollers that have both arm + riscv support. This isn't something insane.
      • dmitrygr 50 minutes ago
        RP2350 has separate cores for that. This is one core that speaks both.
    • petcat 50 minutes ago
      well that's nonsense. IBM does incredibly cool stuff.

      https://research.ibm.com/blog

      • rbanffy 5 minutes ago
        Their research is usually behind paywalls. I miss the days when they published their journals and made PDFs available for download.
      • hnthrow10282910 37 minutes ago
        [dead]
    • porridgeraisin 53 minutes ago
      Those takes are wrong with or without this particular processor.
  • 34679 4 minutes ago
    Right click -> Open image in new tab -> zoom in

    If you haven't already.

  • classichasclass 47 minutes ago
    This feels like a baby step towards Arm being able to emulate z/Arch workloads, maybe with a bit of secret sauce for certain specific operations, which doesn't seem very much like IBM.
    • nxobject 30 minutes ago
      I thought about that, too. I think they’re doing this for the same reason IBM has supported Linux LPARs: since a lot of customers who lease System/z currently probably get overprovisioned hardware that they’ll never fully use, why not try a last-ditch attempt to sell the excess capacity as ARM LPARs?

      Now you’re thinking like a Big Blue sales rep.

  • avhception 16 minutes ago
    Huh. ARM instead of ppc64le?
    • rbanffy 0 minutes ago
      ARM has better software support for AI applications and half of their presentation was about their inference accelerators that can go in the mainframes (and POWER machines).

      IBM mainframes are almost designed by their users. The previous generation skipped a lot of speed boost on the CPU side because their users didn’t want the machine to blow over their power delivery limits.

      Now, with their architecture behind it, I’m sure these ARM Linux partitions will have the fastest ARM cores ever made. My experience with Linux on s390x is that it feels like a normal server that’s just ludicrously fast - almost as if it came from the future.

  • christkv 55 minutes ago
    Is this like the Transmeta processors doing code translation in hardware?
    • bryanlarsen 14 minutes ago
      No, this is more like any modern processor, which translates instruction codes into micro-ops. To over-simplify IBM just has two of these units per thread rather than one.
      • christkv 5 minutes ago
        I wonder how they handle potential differences in memory barriers, instruction order scheduling and other stuff and do they run the core in one mode continuously or do the mix instruction streams from different instruction sets? Anybody got a link to an article?
    • stonogo 45 minutes ago
      They were pretty clear at Hot Chips that it's native
      • pulse7 37 minutes ago
        "code translation in hardware" microcode is called "native"
        • wahern 2 minutes ago
          Yep. All modern Intel and AMD architectures, save maybe some Atom variants, effectively JIT compile the incoming instructions. It's part of the reason the faster-than-static Java/JVM promises never came to fruition. The goal posts moved after the mainstream chips coopted the approach, and they continue to move as pipelines get deeper and broader and transistor count goes up.

          Transmeta was a classic failure--right idea, wrong place & time.

    • LoganDark 49 minutes ago
      Transmeta did code translation with a software JIT. The hardware side had specific support for x86 semantics, similar to how Apple's M-series has supporting hardware for Rosetta's AOT translation, but neither executes x86 machine code directly.
  • markus_zhang 52 minutes ago
    I was curious, is it conceptually similar to Data General Fountainhead project?
    • stonogo 43 minutes ago
      If by that you are asking whether it has a dynamic ISA controllable at runtime, it appears not. This looks to be a Z processor with arm instructions implemented.